STM32G0 MCAL 0.0.1
Tiny MCAL for educational purpose.
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GPT bits values

Macros

#define GPT_INTERRUPT_FLAG_BIT   0
 
#define GPT_ONE_PULSE_MODE_BIT   3u
 
#define GPT_PRESCALER_LSB   0
 
#define GPT_PRESCALER_MSB   16u
 
#define GPT_AUTO_RELOAD_LSB   0
 
#define GPT_AUTO_RELOAD_MSB   16u
 
#define GPT_COUNTER_ENABLE_BIT   0
 
#define GPT_UPDATE_DISABLE_BIT   1u
 

Detailed Description

Symbols to specify the values of the bits on the registers.

Macro Definition Documentation

◆ GPT_AUTO_RELOAD_LSB

#define GPT_AUTO_RELOAD_LSB   0

TIMx_ARR -> [ARR:0]: GPT auto-reload counter least significant bit

◆ GPT_AUTO_RELOAD_MSB

#define GPT_AUTO_RELOAD_MSB   16u

TIMx_ARR -> [ARR:15]: GPT auto-reload counter most significant bit

◆ GPT_COUNTER_ENABLE_BIT

#define GPT_COUNTER_ENABLE_BIT   0

TIMx_CR1 -> CEN: Counter enable bit

◆ GPT_INTERRUPT_FLAG_BIT

#define GPT_INTERRUPT_FLAG_BIT   0

TIMx_SR -> UIF: Update Interrupt flag bit

◆ GPT_ONE_PULSE_MODE_BIT

#define GPT_ONE_PULSE_MODE_BIT   3u

TIMx_CR1 -> OPM: One pulse mode bit

◆ GPT_PRESCALER_LSB

#define GPT_PRESCALER_LSB   0

TIMx_PSC -> [PSC:0]: GPT prescaler least significant bit

◆ GPT_PRESCALER_MSB

#define GPT_PRESCALER_MSB   16u

TIMx_PSC -> [PSC:15]: GPT prescaler most significant bit

◆ GPT_UPDATE_DISABLE_BIT

#define GPT_UPDATE_DISABLE_BIT   1u

TIMx_CR1 -> UDIS: Update disable bit