MCU HSI possible divider values

Macros
#define	MCU_HSI_DIV_OFFSET   11u
#define	MCU_HSI_DIV_MASK   0x3800u
#define	MCU_HSI_DIV1   ( 0UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV2   ( 1UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV4   ( 2UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV8   ( 3UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV16   ( 4UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV32   ( 5UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV64   ( 6UL << MCU_HSI_DIV_OFFSET )
#define	MCU_HSI_DIV128   ( 7UL << MCU_HSI_DIV_OFFSET )

Detailed Description

Macro Definition Documentation

MCU_HSI_DIV1

#define MCU_HSI_DIV1   ( 0UL << MCU_HSI_DIV_OFFSET )

HSI clock not divided

MCU_HSI_DIV128

#define MCU_HSI_DIV128   ( 7UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 128

MCU_HSI_DIV16

#define MCU_HSI_DIV16   ( 4UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 16

MCU_HSI_DIV2

#define MCU_HSI_DIV2   ( 1UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 2

MCU_HSI_DIV32

#define MCU_HSI_DIV32   ( 5UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 32

MCU_HSI_DIV4

#define MCU_HSI_DIV4   ( 2UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 4

MCU_HSI_DIV64

#define MCU_HSI_DIV64   ( 6UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 64

MCU_HSI_DIV8

#define MCU_HSI_DIV8   ( 3UL << MCU_HSI_DIV_OFFSET )

HSI clock divided by 8

MCU_HSI_DIV_MASK

#define MCU_HSI_DIV_MASK   0x3800u

HSI div mask

MCU_HSI_DIV_OFFSET

#define MCU_HSI_DIV_OFFSET   11u

HSI div register offset