RCC PLL Configuration register bits

Macros
#define	RCC_PLLCFGR_PLLPEN   16u
#define	RCC_PLLCFGR_PLLQEN   24u
#define	RCC_PLLCFGR_PLLREN   28u

Detailed Description

Symbols to specify the values of the bits on the registers.

Macro Definition Documentation

RCC_PLLCFGR_PLLPEN

#define RCC_PLLCFGR_PLLPEN   16u

RCC_PLLCFGR -> PLLPEN: PLLPCLK clock output enable

RCC_PLLCFGR_PLLQEN

#define RCC_PLLCFGR_PLLQEN   24u

RCC_PLLCFGR -> PLLQEN: PLLQCLK clock output enable

RCC_PLLCFGR_PLLREN

#define RCC_PLLCFGR_PLLREN   28u

RCC_PLLCFGR -> PLLREN: PLLRCLK clock output enable