STM32G0 MCAL 0.0.1
Tiny MCAL for educational purpose.
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Mcu Architecture Driver More...
Functions | |
static boolean | Validate_ValueInRange (uint32 Value, uint32 MinValue, uint32 MaxValue) |
** Validate value inside a range ** | |
static boolean | Validate_PllSource (uint32 PllSource) |
** Validate PLL clock source ** | |
static uint8 | Get_SysClk (void) |
** Get actual system clock ** | |
void | Mcu_Arch_Init (Mcu_HwUnit *HwUnit, Mcu_ConfigType *ConfigPtr) |
MCU Low Level Initialization | |
Std_ReturnType | Mcu_Arch_InitRamSection (Mcu_HwUnit *HwUnit, Mcu_RamSectionType RamSection) |
MCU Low Level RAM Initialization | |
Std_ReturnType | Mcu_Arch_InitClock (Mcu_HwUnit *HwUnit, Mcu_ClkConfigType *ClockSetting) |
MCU Low Level Clock Initialization | |
Std_ReturnType | Mcu_Arch_DistributePllClock (Mcu_HwUnit *HwUnit) |
Low Level PLL to MCU Clock distribution | |
Mcu_PllStatusType | Mcu_Arch_GetPllStatus (Mcu_HwUnit *HwUnit) |
Get PLL Low Level lock status | |
Mcu_ResetType | Mcu_Arch_GetResetReason (Mcu_HwUnit *HwUnit) |
Get MCU Low Level reset type | |
Mcu_RawResetType | Mcu_Arch_GetResetRawValue (Mcu_HwUnit *HwUnit) |
Get reset raw value Low Level | |
void | Mcu_Arch_PerformReset (Mcu_HwUnit *HwUnit) |
Reset the MCU Low Level | |
void | Mcu_Arch_SetMode (Mcu_HwUnit *HwUnit, Mcu_ModeType McuMode) |
Set MCU Low Level power mode | |
Mcu_RamStateType | Mcu_Arch_GetRamState (Mcu_HwUnit *HwUnit) |
**Get status of MCU RAM Low Level ** | |
Variables | |
static Rcc_RegisterType * | Rcc = RCC |
Global Rcc registers pointer. | |
Mcu Architecture Driver
Mcu Specific Architecture Driver
Mcu driver implementation for the STM32G0xx family of microcontrollers. This file contains the hardware specific implementation of the Mcu driver. The file is implemented as a means of abstraction from the hardware, this way we can avoid to include Arch headers in the actual driver header, making the low level interfaces available only for the inmediate upper layer.
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static |
** Get actual system clock **
Get the actual clock used by system (RCC_CFGR[5:3])
uint8 | Used sysclock |
< RCC_MCOPRE -> SW: System clock switch
< RCC_MCOPRE -> SW: System clock switch
Std_ReturnType Mcu_Arch_DistributePllClock | ( | Mcu_HwUnit * | HwUnit | ) |
Low Level PLL to MCU Clock distribution
Service to activate the PLL clock to the MCU clock distribution.
HwUnit | Pointer to the hardware unit configuration |
Std_ReturnType | E_OK if the command has been accepted, E_NOT_OK if the command has not been accepted e.g. due to parameter error |
< RCC_CR -> PLLRDY: PLL clock ready flag
< RCC_PLLCFGR -> PLLREN: PLLRCLK clock output enable
< Mask for SYS CLOCK SOURCE
< Offset for SYS CLOCK SOURCE
< PLL output as system clock
Mcu_PllStatusType Mcu_Arch_GetPllStatus | ( | Mcu_HwUnit * | HwUnit | ) |
Get PLL Low Level lock status
Service which provides the lock status of the PLL
HwUnit | Pointer to the hardware unit configuration |
Mcu_PllStatusType | MCU_PLL_LOCKED when the PLL is locked, MCU_PLL_UNLOCKED, MCU_PLL_STATUS_UNDEFINED when status is unknown |
< RCC_CR -> PLLRDY: PLL clock ready flag
Mcu_RamStateType Mcu_Arch_GetRamState | ( | Mcu_HwUnit * | HwUnit | ) |
**Get status of MCU RAM Low Level **
Service which provides the actual status of the microcontroller RAM. (if supported)
HwUnit | Pointer to the hardware unit configuration |
Mcu_RamStateType | Status of the RAM Content |
Mcu_RawResetType Mcu_Arch_GetResetRawValue | ( | Mcu_HwUnit * | HwUnit | ) |
Get reset raw value Low Level
Service which reads the reset type from the hardware register, if supported
HwUnit | Pointer to the hardware unit configuration |
Mcu_RawResetType | Reset raw value |
Mcu_ResetType Mcu_Arch_GetResetReason | ( | Mcu_HwUnit * | HwUnit | ) |
Get MCU Low Level reset type
Service which reads the reset type from the hardware, if supported
HwUnit | Pointer to the hardware unit configuration |
Mcu_ResetType | MCU_POWER_ON_RESET, MCU_WATCHDOG_RESET, MCU_SW_RESET, MCU_RESET_UNDEFINED |
void Mcu_Arch_Init | ( | Mcu_HwUnit * | HwUnit, |
Mcu_ConfigType * | ConfigPtr ) |
MCU Low Level Initialization
Service to initialize the MCU driver
HwUnit | Pointer to the hardware unit configuration |
ConfigPtr | Pointer to MCU driver configuration set |
< High-speed External
< Offset for SYS CLOCK SOURCE
< HSE as system clock
< HSE Enabled
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< RCC_CR -> HSEON: HSE clock enable
< External clock source for HSE clock
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< High-speed Internal
< HSI Enabled
< HSI div register offset
< HSI clock not divided
< HSI div register offset
< HSI clock divided by 128
< HSI div mask
< HSI calibration min value
< HSI calibration max value
< HSI calibration min value
< HSI calibration min value
< RCC_CR -> HSION: HSI16 clock enable
< Offset for SYS CLOCK SOURCE
< HSI as system clock
< RCC_CR -> HSION: HSI16 clock enable
< 48MHz Internal RC
< HSI48 Enabled
< RCC_CR -> HSI48ON: Enable HSI48 RC Oscillator
< RCC_CR -> HSI48ON: Enable HSI48 RC Oscillator
< Low-speed External
< Offset for SYS CLOCK SOURCE
< LSE as system clock
< LSE Enabled
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEBYP: LSE oscillator bypass
< RCC_BDCR -> LSEON: LSE oscillator enable
< External clock source for LSE clock
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEBYP: LSE oscillator bypass
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEON: LSE oscillator enable
< Low-speed Internal
< Offset for SYS CLOCK SOURCE
< LSI as system clock
< LSI Enabled
< RCC_CSR -> LSION: LSI oscillator enable
< RCC_CSR -> LSION: LSI oscillator enable
Std_ReturnType Mcu_Arch_InitClock | ( | Mcu_HwUnit * | HwUnit, |
Mcu_ClkConfigType * | ClockSetting ) |
MCU Low Level Clock Initialization
Service to initialize the PLL and other MCU specific clock options.
HwUnit | Pointer to the hardware unit configuration |
ClockSetting | Pass the settings to configure Mcu clock |
Std_ReturnType | E_OK if the command has been accepted, E_NOT_OK if the command has not been accepted e.g. due to parameter error |
< High-speed External
< Offset for SYS CLOCK SOURCE
< HSE as system clock
< HSE Enabled
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< RCC_CR -> HSEON: HSE clock enable
< External clock source for HSE clock
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEON: HSE clock enable
< RCC_CR -> HSEBYP: HSE crystal oscillator bypass
< High-speed Internal
< HSI Enabled
< HSI div register offset
< HSI clock not divided
< HSI div register offset
< HSI clock divided by 128
< HSI div mask
< HSI calibration min value
< HSI calibration max value
< HSI calibration min value
< HSI calibration min value
< RCC_CR -> HSION: HSI16 clock enable
< Offset for SYS CLOCK SOURCE
< HSI as system clock
< RCC_CR -> HSION: HSI16 clock enable
< 48MHz Internal RC
< HSI48 Enabled
< RCC_CR -> HSI48ON: Enable HSI48 RC Oscillator
< RCC_CR -> HSI48ON: Enable HSI48 RC Oscillator
< Low-speed External
< Offset for SYS CLOCK SOURCE
< LSE as system clock
< LSE Enabled
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEBYP: LSE oscillator bypass
< RCC_BDCR -> LSEON: LSE oscillator enable
< External clock source for HSE clock
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEBYP: LSE oscillator bypass
< RCC_BDCR -> LSEON: LSE oscillator enable
< RCC_BDCR -> LSEON: LSE oscillator enable
< Low-speed Internal
< Offset for SYS CLOCK SOURCE
< LSI as system clock
< LSI Enabled
< RCC_CSR -> LSION: LSI oscillator enable
< RCC_CSR -> LSION: LSI oscillator enable
< PLL will enabled
< RCC_CR -> PLLON: PLL enable
< Mask for PLL Source bits
< Bit where starts PLLM
< PLL M divide by 1
< Bit where starts PLLM
< PLL M divide by 8
< Mask for PLLM
< PLLN Multiplcator min value is 8
< PLLN Multiplcator max value is 86
< Bits used by PLLN value
< Bit where starts PLLN
< Bit where starts PLLP
< PLL P divide by 2
< Bit where starts PLLP
< PLL P divide by 32
< PLLP mask
< RCC_PLLCFGR -> PLLPEN: PLLPCLK clock output enable
< Bit where starts PLLQ
< PLL Q divide by 2
< Bit where starts PLLQ
< PLL Q divide by 8
< PLLQ mask
< RCC_PLLCFGR -> PLLQEN: PLLQCLK clock output enable
< Bit where starts PLLR
< PLL R divide by 2
< Bit where starts PLLR
< PLL R divide by 8
< PLLR mask
< RCC_PLLCFGR -> PLLREN: PLLRCLK clock output enable
< RCC_CR -> PLLON: PLL enable
< RCC_CR -> PLLON: PLL enable
< Offset for SYS CLOCK SOURCE
< HSI as system clock
< RCC_CR -> HSION: HSI16 clock ready flag
< Offset for SYS CLOCK SOURCE
< HSE as system clock
< RCC_CR -> HSERDY: HSE clock ready flag
< Offset for SYS CLOCK SOURCE
< PLL output as system clock
< RCC_CR -> PLLRDY: PLL clock ready flag
< Offset for SYS CLOCK SOURCE
< LSI as system clock
< RCC_CSR -> LSIRDY: LSI oscillator ready
< Offset for SYS CLOCK SOURCE
< LSE as system clock
< RCC_BDCR -> LSERDY: LSE oscillator ready
< Mask for SYS CLOCK SOURCE
< Bit where starts AHB div
< AHB Clock divided by 128
< Bit where starts AHB div
< AHB Clock divided by 256
< Mask for AHB div
< Bit where starts APB1 div
< APB1 Clock not divided
< Bit where starts APB1 div
< APB1 Clock divided by 16
< Mask for APB1 div
Std_ReturnType Mcu_Arch_InitRamSection | ( | Mcu_HwUnit * | HwUnit, |
Mcu_RamSectionType | RamSection ) |
MCU Low Level RAM Initialization
Service to initialize the RAM section wise
HwUnit | Pointer to the hardware unit configuration |
RamSection | Selects RAM memory section provided in configuration set |
Std_ReturnType | E_OK if the command has been accepted, E_NOT_OK if the command has not been accepted e.g. due to parameter error |
void Mcu_Arch_PerformReset | ( | Mcu_HwUnit * | HwUnit | ) |
Reset the MCU Low Level
Service to perform a microcontroller reset
HwUnit | Pointer to the hardware unit configuration |
void Mcu_Arch_SetMode | ( | Mcu_HwUnit * | HwUnit, |
Mcu_ModeType | McuMode ) |
Set MCU Low Level power mode
Service to activate the MCU power modes
HwUnit | Pointer to the hardware unit configuration |
McuMode | Set different MCU power modes configured in the configuration set |
** Validate PLL clock source **
Validates that PLL source is an allowed value. If allowed values are sorted, is possible to verify that is between max and min values
PllSource | PLL source to validate |
boolean | E_OK if the value is valid, E_NOT_OK otherwise |
< No clock source selected as source for PLL
< HSE as source for PLL (XTAL external)
< Avoid this value. Reserved
** Validate value inside a range **
Validates that passed avlue is allowed. If allowed values are sorted, is possible to verify that is between max and min values
Value | Value to validate |
MinValue | Min value |
MaxValue | Max value |
boolean | E_OK if the value is valid, E_NOT_OK otherwise |