STM32G0 MCAL 0.0.1
Tiny MCAL for educational purpose.
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Nested Vectored Interrupt Controller (NVIC) structure. More...
#include <Registers.h>
Data Fields | |
volatile uint32 | ISER [1U] |
volatile uint32 | RESERVED0 [31U] |
volatile uint32 | ICER [1U] |
volatile uint32 | RESERVED1 [31U] |
volatile uint32 | ISPR [1U] |
volatile uint32 | RESERVED2 [31U] |
volatile uint32 | ICPR [1U] |
volatile uint32 | RESERVED3 [31U] |
volatile uint32 | RESERVED4 [64U] |
volatile uint32 | IP [8U] |
Nested Vectored Interrupt Controller (NVIC) structure.
volatile uint32 Nvic_RegisterType::ICER[1U] |
Offset: 0x080 (R/W) Interrupt Clear Enable Register
volatile uint32 Nvic_RegisterType::ICPR[1U] |
Offset: 0x180 (R/W) Interrupt Clear Pending Register
volatile uint32 Nvic_RegisterType::IP[8U] |
Offset: 0x300 (R/W) Interrupt Priority Register
volatile uint32 Nvic_RegisterType::ISER[1U] |
Offset: 0x000 (R/W) Interrupt Set Enable Register
volatile uint32 Nvic_RegisterType::ISPR[1U] |
Offset: 0x100 (R/W) Interrupt Set Pending Register
volatile uint32 Nvic_RegisterType::RESERVED0[31U] |
Reserved memory.
volatile uint32 Nvic_RegisterType::RESERVED1[31U] |
Reserved memory.
volatile uint32 Nvic_RegisterType::RESERVED2[31U] |
Reserved memory.
volatile uint32 Nvic_RegisterType::RESERVED3[31U] |
Reserved memory.
volatile uint32 Nvic_RegisterType::RESERVED4[64U] |
Reserved memory.